Architecture of Microcontroller
Tiva TM4C123GH6PM microcontroller is supported ARM Cortex M4F architecture. Architecture generally consists of five main blocks i.e ARM Cortex M4F processor core, On-chip memory, System peripherals, Serial peripherals, Analog peripherals, and Motion control peripherals.
Fig. 2.1: TM4C123GH6PM Architecture
2.1 ARM Cortex M4F processor core
TM4C123GH6PM microcontroller core is based on ARM Cortex-M processor core. It provides high performance, low power consumption, low cost platform with reduced pin counts.
2.1.1 Processor core:
- ARM Cortex M4F is a 32-bit processor, 32-bit data path, 32-bit register bank, 32-bit memory interface.
- It supports operation on a minimum of 3.125Hz to a maximum of 80MHz frequency. Executing 100 Dhrystone Instructions per second.
- Supports Thumb-2 mixed 16/32 bit instructions with a 16-bit vector processing unit.
- It follows Harvard architecture with 3 stages pipelined fetch, decodes, and execution.
2.1.2 Embedded Trace Macrocell (ETM):
Embedded trace Macrocell unit provides information about the execution flow of the application by tracing data through the data watchdog timer and instruction through ETM. It helps in compiling programs, checking errors, and tracing instructions.
2.1.3 Floating Point Unit (FPU):
Floating point unit is capable of performing single-precision 32 bit floating point operation. It supports addiction, subtraction, multiplication, accumulate and square root operation. FPU is use to convert value from fixed point to floating point and vice versa. It works on IEE standard 754
2.1.4 Nested Vector Interrupt Controller (NVIC):
Nested vector interrupt controller is an embedded interrupt controller that supports the configuration of external interrupts with 78 interrupts and 154 exceptions. It allows us to assign a programmable priority level from 0 to 7, 0 being the highest priority level. It also supports the tail chaining (back to back) of interrupts. Through tail chaining, the low latency of interrupts is achieved. Along with this operation, NVIC also supports Non-Maskable Interrupt (NMI) and also Wake-up Interrupt Controller (WIC) for providing ultra-low power sleep mode support.
2.1.5 Memory Protection Unit (MPU):
The memory protection unit divides the memory into a number of regions and assigns each region with the memory location, size, access permission, and memory attributes. Is divides memory into eight separate regions from 0-7 and background region. Background region generally used for the embedded OS which is accessible only from privileged mode. MPU also used to manage memory fault exceptions.
2.1.6 System Control and Clocks:
The System control block is the programmers model that provides system implementation information, control configuration, system control, and reporting system exceptions.
2.1.7 System Timer-SysTick:
TM4C123GH6PM Cortex-M4F processor has a 24-bit down count system timer, which starts the count from a specific reloaded value to zero. When value reaches zero, system timer wraps up and reloads the value stored in reload value register and again start counting down during the subsequent clocks. It is generally used to provide a periodic interrupt.
2.2 On-Chip memory
TM4C123GH6PM microcontroller consists of the following set of on-chip memory.
- 32KB single cycle RAM
- 256 KB flash memory
- 2 KB EEPROM
- Internal ROM
TM4C123GH6PM microcontroller consists of 32 KB single-cycle on-chip RAM. SRAM is used as data memory in a microcontroller. It is a volatile and fastest among all the memory in the microcontroller. It provides a good read and writes that's why it is used as data memory in the microcontroller. Data is accessed from SARM by using DMA or USB.
2.2.2 Flash memory:
TM4C123GH6PM microcontroller consists of 256KB single-cycle on-chip Flash memory. This memory is divided into blocks of 1KB that can be erased individually. It is a non-volatile type of memory that is used to store the main program. Flash memory takes very less time to read data, consuming less power with less density.
2.2.3 EEPROM:
TM4C123GH6PM microcontroller consists of 2KB of EEPROM memory. This memory is used as data memory. EEPROM supports byte-wise read, write, and erase operation.
2.2.4 Internal ROM:
TM4C123GH6PM microcontroller internal ROM is loaded with software programs: TivaWare peripheral driver library, TivaWare boot loader, AES cryptography tables, CRC error detection function.
2.3 System Peripherals:
The TM4C123GH6PM microcontroller core is loaded with some internal peripherals. These peripherals are shown below.
2.3.1 Direct Memory Access (DMA) :
Direct Memory Access transfers data blocks from external peripherals to the main memory and vice versa. DMA transfers data without interrupting the operation of the processor core and increases the speed of operation.
2.3.2 General Purpose Input Output :
TM4C123GH6PM microcontroller consists of six GPIO blocks with each corresponds to the individual GPIO port. GPIO pins support the multi-functional operation. These pins support 5V tolerance for digital input and output. External peripherals are connected by using GPIO pins.
2.3.3 General Purpose Timers:
TM4C123GH6PM microcontroller consists of six 16/32 bit and six 32/64 bit programmable timer which can be used independently. These timers are used to maintain external operation in synchronization with the system clock or external clock. Timers are used to generate delay or baud rates.
2.3.4 Watchdog Timer:
A watchdog timer is used to regain control of the system when the system is giving errors or unexpected output. A watchdog timer is a hardware timer used to generate interrupts, non-maskable interrupt or reset when time-out value is reached. The TM4C123GH6PM microcontroller consists of two watchdog timers. This timer is a 32 bit down counter with programmable load value.
2.3.5 Hibernation module :
The TM4C123GH6PM microcontroller supports hibernation mode. When external peripheral connected to the microcontroller is in an idle state then power is only provided to the hibernation module. An external supply source is used to power up this module. This module is operating on a frequency of 32.768 kHz frequency with external crystal.
2.4 Serial Communication Peripherals:
For serial communication on TM4C123GH6PM microcontroller, five types of modules are used. These modules are explained below.
2.4.1 Universal Serial Bus (USB) controller :
To communicate with external host devices USB modules are used. This module is working on the USB 2.0 standard. This USB supports an operational speed of 12-Mbps for full-speed operation and 1.5-Mbps for low-speed operation. USB supports interrupt generation and control operation. Onboard USB present on Tiva Launchpad is connected with this USB module used to power ON device or to connect external devices.
2.4.2 Synchronous Serial Interface (SSI) :
Synchronous Serial Interface is a four-wire Bi-directional communication interface that converts serial data into serial to parallel and vice versa. TM4C123GH6PM microcontroller consists of four SSI modules. SSI consists of four pins: clock, chip select, transmit, and receive. A clock pin is used to provide a clock signal for external peripherals. Chip select is used to select an external peripheral. Transmit send data from the controller to the external peripheral and receive send data from external peripheral to the controller.
2.4.3 Universal Asynchronous Receiver/Transmitter (UART):
TM4C123GH6PM microcontroller consists of eight UART module. It supports the operation speed of 5Mbps to 10Mbps. UART module consists of two pins: Transmit and Receive. This module supports individual interrupt generation using Rx and Tx pins. UART module is used to manage the data coming from external ports.
2.4.4 Inter-Integrated Circuit (I2C):
Inter-Integrated Circuit is a two wires bi-directional serial communication protocol use for serial transmission of data at low speed. It consists of two wire SCA (for clock) and SDA (for data). SDA transmit data in one direction at a time. TM4C123GH6PM microcontroller consists of four I2C modules.
2.4.5 Controller Area Network (CAN) :
CAN is a serial communication protocol used to multiple peripheral devices without a host device. This protocol is mainly used for industrial and automotive applications. TM4C123GH6PM microcontroller consists of two CAN modules that work on version 2.0.
2.5 Analog Peripherals:
For the analog operation on the TM4C123GH6PM microcontroller, Analog comparator and Analog to Digital, converter module is used
2.5.1 Analog comparator module:
The TM4C123GH6PM microcontroller contains two Analog comparator modules with each module consists of three pins. This module taking positive and negative input signal, and basis of this signal it provides a digital output at the output the terminal. This module is also used to generate an interrupt for the microcontroller.
2.5.2 Analog to Digital converter:
ADC module is used to convert a continuous analog signal into a discrete digital signal. TM4C123GH6PM microcontroller consists of 12 ADC channels which are used to convert analog data in 12-bit binary data. This module also supports interrupt generation and sequence priority.
2.6 Motion Control Peripherals:
TM4C123GH6PM microcontroller consists of integrated PWM modules and Quadrature Encoder Input for controlling the motion. Both these modules are accessed by using APB.
2.6.1 PWM module:
The TM4C123GH6PM microcontroller contains two PWM modules each with four PWM generator and control block, for a total gives 16PWM output signal. High-resolution counters are used in PWM modules to generate a PWM signal. These signals are used for switching power supplies or motor control.
2.6.2 Quadrature Encoder Input:
The QEI module provides the 2 channel interface to incremental encoders, which is used to convert linear displacement into a pulse signal. By monitoring the number of pulses and relative phases of two signals, position, the direction of rotation and speed can be tracked. The TM4C123GH6PM microcontroller includes two QEI modules providing controls at the same time.
2.7 Advanced Microcontroller BUS architecture:
Internal data transfer between different blocks of the microcontroller is controlled by using BUS architecture. Two types of buses are used to control this flow of data.
- Advanced Peripheral Bus (APB)
- Advanced High-Performance Bus (AHB)
2.7.1 Advanced Peripheral Bus (APB):
APB is used for connecting low power and low-frequency peripheral blocks that required low bandwidth for transmission, like serial peripherals, watchdog timer, timer. The number of slave devices is communicating with a shared bus. No burst data transfer is supported on APB.
2.7.2 Advanced High-Performance Bus (AHB):
AHB is used for connecting high performance and high-frequency blocks that required higher bandwidth for transmission, like Processor core, different memories, and direct memory access circuit. It is possible to communicate with multiple master devices with multiple slaves on AHB. This bus has higher bandwidth so data transfer takes place in burst operation.
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